1. Field of the Invention
The invention relates to an information recording and reproducing apparatus of a magnetic disk, an MO, an optical disk, a magnetic tape device, or the like and to a signal decoding circuit and information recording medium and method. More particularly, the invention relates to an information recording and reproducing apparatus for sampling a head reproduced signal by an asynchronous dock and, thereafter, performing a timing recovery and a gain control and to a signal decoding circuit and information recording medium and method.
2. Description of the Related Arts
FIG. 1 shows an example of a sector format in a conventional magnetic disk apparatus, and it is constructed by a preamble part 200, sync bytes 202, data 204, an ECC 206, and a pad 208. That is, a specific code train called a preamble part 200 is recorded at the head in the sector format. Upon reproduction, acquisition of a phase and a frequency of a timing recovery PLL circuit for clock extraction and acquisition of a gain in an AGC circuit for amplitude correction are performed by using a head reproduced signal corresponding to the preamble part 200. A specific code train called sync bytes 202 is recorded in the second area. Upon reproduction, the sync bytes 202 are detected and a head bit of the subsequent data 204 is presumed. Hitherto, the data 204 is converted into an RLL code (Run Length Limited Code) in which a length for which a code “0” continues is limited so as to follow the clock extraction and amplitude correction and recorded. Therefore, position information of the head bit of the data 204 is used for decoding the RLL code.
A recent magnetic disk apparatus uses an MR (magneto-resistive) head as a reproducing head. Since the MR head floats above the surface of the disk medium only by 30 to 50 nm, there is a case where the head is come into contact with or collides with a projection or the like on the disk surface. When the contact or collision occurs, a resistance value increases in association with an increase in head temperature, so that a DC level of a reproduced signal fluctuates largely. Such a phenomenon is called a thermal asperity (TA) phenomenon. When the TA occurs, a signal of a large amplitude is inputted and an adverse influence is caused in the AGC circuit and PLL circuit which have been operating stably so far, so that an error is generated in demodulation data. In order to enable the data to be decoded even in the case where the sync bytes cannot be detected due to the data error by such a thermal asperity (TA), as shown in a sector format of FIG. 2, the data is split into two data 204-1 and 204-2 and spare sync bytes 202-2 are provided in addition to sync bytes 202-1. In this case, generally, the sync bytes 202-1 and 202-2 are separated by presuming a case where the reproduced signal deteriorates in a wide range. When a portion including the sync bytes 202-1 deteriorates upon reproduction of the data, although the data 204-1 subsequent to the sync bytes 202-1 cannot be demodulated, by setting a length of data 204-1 to a length below the maximum correcting ability of the ECC, the error can be corrected.
FIG. 3 is a diagram showing a block in a read channel which is installed as a data demodulating IC into a conventional magnetic disk apparatus. Upon data reproduction, an analog voltage from the reproducing head is amplified by a preamplifier of a head IC and, thereafter, it is sent to a read channel 210. In the read channel 210, the signal passes through a variable gain amplifier (VGA) 212, a CT filter 214 which functions as a low pass filter, and an A/D converter (ADC) 216 and is converted into a digital signal. Subsequently, a waveform equalization is executed by an FIR filter 218 and, thereafter, for example, a Viterbi decoding is executed by a decoder 220. The decoded data is further decoded by an RLL decoder 222. At this time, a head bit position detected by a sync byte detector 230 is used.
A timing recovery unit 226 having a PLL to control timing of clocks which are generated from a voltage controlled oscillator (VCO) 228 in order to sample the signal by the A/D converter 216 is also installed in the read channel 210. A gain controller 224 for correcting an amplitude by controlling a gain of the variable gain amplifier 212 is also installed in the read channel 210. That is, the timing recovery unit 226 obtains a phase error Δτ by using an output signal y of the FIR filter 218 and its decision value Y={0, −1, +1} and controls the VCO 228 so as to eliminate the phase error Δτ. A gain error Δγ is obtained by the output signal y of the FIR filter 218 and its decision value Y={0, −1, +1} and a control voltage Vg of the gain controller 224 is adjusted so as to eliminate the gain error Δγ, thereby correcting the amplitude by the VGA 212.
FIG. 4 is a diagram showing another example of a construction of a conventional read channel. In this case, a sampling operation of the A/D converter 216 is performed asynchronously with the reproduced signal by using a fixed clock from a voltage controlled oscillator (VCO) 234. Subsequent to the FIR filter 218, an interpolating filter 232 is provided. An inherent sampling time T is obtained on the basis of the phase error Δτ of the equation (1) obtained by a timing recovery unit 236. An amplitude y at the sampling time T is obtained by an interpolating operation.
In the magnetic disk apparatus, if it is intended to accomplish the further high density recording, a recording area per bit decreases and an S/N ratio deteriorates. Therefore, many noise components are multiplexed even to an output of the FIR filter used in the waveform equalization of the read channel, a decision result Y in the decoder is also likely to become an error. In such a case, the operation of a feedback system of the timing recovery and the amplitude correction becomes unstable and there is a fear such that the data is not normally demodulated. The RLL code is constructed by selecting a data train (code word) in which the succession of “0” is restricted for the original data train. To design a code of high efficiency which takes into consideration a coding ratio, it is necessary to determine the code word from the front/rear relation of the original data. An error of one bit in the code word upon data demodulation becomes an error of a plurality of bits in a data train serving as an RLL decoder output. There is a problem such that such an error propagation remarkably deteriorates an effect of the ECC.